Discussion:
[dmidecode] [PATCH 00/10] dmidecode: Add support for SMBIOS version 3.1.0
Jean Delvare
2017-04-10 09:51:03 UTC
Permalink
This patch series adds support for version 3.1.0 of the SMBIOS
specification to dmidecode.
--
Jean Delvare

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Jean Delvare
2017-04-10 09:54:25 UTC
Permalink
Add 4 new enumerated values for chassis types from SMBIOS
specification version 3.1.0.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-07 10:52:32.038909760 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:52:34.452934367 +0200
@@ -565,12 +565,16 @@ static const char *dmi_chassis_type(u8 c
"Blade Enclosing",
"Tablet",
"Convertible",
- "Detachable" /* 0x20 */
+ "Detachable",
+ "IoT Gateway",
+ "Embedded PC",
+ "Mini PC",
+ "Stick PC" /* 0x24 */
};

code &= 0x7F; /* bits 6:0 are chassis type, 7th bit is the lock bit */

- if (code >= 0x01 && code <= 0x20)
+ if (code >= 0x01 && code <= 0x24)
return type[code - 0x01];
return out_of_spec;
}
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:53:53 UTC
Permalink
Add support for the "Extended BIOS ROM Size" field introduced in
SMBIOS specification version 3.1.0.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-07 10:52:11.574701147 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:52:32.038909760 +0200
@@ -295,6 +295,18 @@ static void dmi_bios_runtime_size(u32 co
printf(" %u kB", code >> 10);
}

+static void dmi_bios_rom_size(u8 code1, u16 code2)
+{
+ static const char *unit[4] = {
+ "MB", "GB", out_of_spec, out_of_spec
+ };
+
+ if (code1 != 0xFF)
+ printf(" %u kB", (code1 + 1) << 6);
+ else
+ printf(" %u %s", code2 & 0x3FFF, unit[code2 >> 14]);
+}
+
static void dmi_bios_characteristics(u64 code, const char *prefix)
{
/* 7.1.1 */
@@ -3271,8 +3283,9 @@ static void dmi_decode(const struct dmi_
dmi_bios_runtime_size((0x10000 - WORD(data + 0x06)) << 4);
printf("\n");
}
- printf("\tROM Size: %u kB\n",
- (data[0x09] + 1) << 6);
+ printf("\tROM Size:");
+ dmi_bios_rom_size(data[0x09], h->length < 0x1A ? 16 : WORD(data + 0x18));
+ printf("\n");
printf("\tCharacteristics:\n");
dmi_bios_characteristics(QWORD(data + 0x0A), "\t\t");
if (h->length < 0x13) break;
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:54:50 UTC
Permalink
Add 6 new enumerated values for processor families and 7 new
enumerated values for processor upgrades from SMBIOS specification
version 3.1.0.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-07 10:52:50.906102073 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:52:51.315106242 +0200
@@ -736,7 +736,9 @@ static const char *dmi_processor_family(
{ 0x2A, "Core Solo Mobile" },
{ 0x2B, "Atom" },
{ 0x2C, "Core M" },
-
+ { 0x2D, "Core m3" },
+ { 0x2E, "Core m5" },
+ { 0x2F, "Core m7" },
{ 0x30, "Alpha" },
{ 0x31, "Alpha 21064" },
{ 0x32, "Alpha 21066" },
@@ -788,6 +790,8 @@ static const char *dmi_processor_family(
{ 0x66, "Athlon X4" },
{ 0x67, "Opteron X1000" },
{ 0x68, "Opteron X2000" },
+ { 0x69, "Opteron A-Series" },
+ { 0x6A, "Opteron X3000" },

{ 0x70, "Hobbit" },

@@ -899,6 +903,8 @@ static const char *dmi_processor_family(
{ 0xFA, "i860" },
{ 0xFB, "i960" },

+ { 0x100, "ARMv7" },
+ { 0x101, "ARMv8" },
{ 0x104, "SH-3" },
{ 0x105, "SH-4" },
{ 0x118, "ARM" },
@@ -1050,7 +1056,7 @@ static void dmi_processor_id(u8 type, co
}
}
else if ((type >= 0x0B && type <= 0x15) /* Intel, Cyrix */
- || (type >= 0x28 && type <= 0x2C) /* Intel */
+ || (type >= 0x28 && type <= 0x2F) /* Intel */
|| (type >= 0xA1 && type <= 0xB3) /* Intel */
|| type == 0xB5 /* Intel */
|| (type >= 0xB9 && type <= 0xC7) /* Intel */
@@ -1062,7 +1068,7 @@ static void dmi_processor_id(u8 type, co
|| type == 0x1F /* AMD */
|| (type >= 0x38 && type <= 0x3F) /* AMD */
|| (type >= 0x46 && type <= 0x4F) /* AMD */
- || (type >= 0x66 && type <= 0x68) /* AMD */
+ || (type >= 0x66 && type <= 0x6A) /* AMD */
|| (type >= 0x83 && type <= 0x8F) /* AMD */
|| (type >= 0xB6 && type <= 0xB7) /* AMD */
|| (type >= 0xE4 && type <= 0xEF)) /* AMD */
@@ -1224,10 +1230,17 @@ static const char *dmi_processor_upgrade
"Socket LGA1150",
"Socket BGA1168",
"Socket BGA1234",
- "Socket BGA1364" /* 0x30 */
+ "Socket BGA1364",
+ "Socket AM4",
+ "Socket LGA1151",
+ "Socket BGA1356",
+ "Socket BGA1440",
+ "Socket BGA1515",
+ "Socket LGA3647-1",
+ "Socket SP3" /* 0x37 */
};

- if (code >= 0x01 && code <= 0x30)
+ if (code >= 0x01 && code <= 0x37)
return upgrade[code - 0x01];
return out_of_spec;
}
--
Jean Delvare
SUSE L3 Support

_______________________________________________
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Jean Delvare
2017-04-10 09:55:11 UTC
Permalink
The processor family code can be 16-bit since SMBIOS version 2.6, add
support for this possibility to function dmi_processor_id.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-07 10:52:51.315106242 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:52:53.382127310 +0200
@@ -972,7 +972,7 @@ static const char *dmi_processor_family(
}
}

-static void dmi_processor_id(u8 type, const u8 *p, const char *version, const char *prefix)
+static void dmi_processor_id(const struct dmi_header *h, const char *prefix)
{
/* Intel AP-485 revision 36, table 2-4 */
static const char *flags[32] = {
@@ -1009,13 +1009,14 @@ static void dmi_processor_id(u8 type, co
NULL, /* 30 */
"PBE (Pending break enabled)" /* 31 */
};
- /*
- * Extra flags are now returned in the ECX register when one calls
- * the CPUID instruction. Their meaning is explained in table 3-5, but
- * DMI doesn't support this yet.
- */
+ const u8 *data = h->data;
+ const u8 *p = data + 0x08;
u32 eax, edx;
int sig = 0;
+ u16 type;
+
+ type = (data[0x06] == 0xFE && h->length >= 0x2A) ?
+ WORD(data + 0x28) : data[0x06];

/*
* This might help learn about new processors supporting the
@@ -1075,6 +1076,7 @@ static void dmi_processor_id(u8 type, co
sig = 2;
else if (type == 0x01 || type == 0x02)
{
+ const char *version = dmi_string(h, data[0x10]);
/*
* Some X86-class CPU have family "Other" or "Unknown". In this case,
* we use the version string to determine if they are known to
@@ -1095,6 +1097,11 @@ static void dmi_processor_id(u8 type, co
else /* not X86-class */
return;

+ /*
+ * Extra flags are now returned in the ECX register when one calls
+ * the CPUID instruction. Their meaning is explained in table 3-5, but
+ * DMI doesn't support this yet.
+ */
eax = DWORD(p);
edx = DWORD(p + 4);
switch (sig)
@@ -3426,7 +3433,7 @@ static void dmi_decode(const struct dmi_
dmi_processor_family(h, ver));
printf("\tManufacturer: %s\n",
dmi_string(h, data[0x07]));
- dmi_processor_id(data[0x06], data + 0x08, dmi_string(h, data[0x10]), "\t");
+ dmi_processor_id(h, "\t");
printf("\tVersion: %s\n",
dmi_string(h, data[0x10]));
printf("\tVoltage:");
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:55:36 UTC
Permalink
Version 3.1.0 of the SMBIOS specification says that the Processor ID
field maps to the MIDR register on ARM processors, decode it.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
--- dmidecode.orig/dmidecode.c 2017-04-05 15:41:00.952972830 +0200
+++ dmidecode/dmidecode.c 2017-04-06 11:27:12.191062872 +0200
@@ -1056,6 +1056,22 @@ static void dmi_processor_id(const struc
return;
}
}
+ else if ((type >= 0x100 && type <= 0x101) /* ARM */
+ || (type >= 0x118 && type <= 0x119)) /* ARM */
+ {
+ u32 midr = DWORD(p);
+ /*
+ * The format of this field was not defined for ARM processors
+ * before version 3.1.0 of the SMBIOS specification, so we
+ * silently skip it if it reads all zeroes.
+ */
+ if (midr == 0)
+ return;
+ printf("%sSignature: Implementor 0x%02x, Variant 0x%x, Architecture %u, Part 0x%03x, Revision %u\n",
+ prefix, midr >> 24, (midr >> 20) & 0xF,
+ (midr >> 16) & 0xF, (midr >> 4) & 0xFFF, midr & 0xF);
+ return;
+ }
else if ((type >= 0x0B && type <= 0x15) /* Intel, Cyrix */
|| (type >= 0x28 && type <= 0x2F) /* Intel */
|| (type >= 0xA1 && type <= 0xB3) /* Intel */
@@ -1094,7 +1110,7 @@ static void dmi_processor_id(const struc
else
return;
}
- else /* not X86-class */
+ else /* neither X86 nor ARM */
return;

/*
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:55:58 UTC
Permalink
Add support for the "Maximum Cache Size 2" and "Installed Cache Size
2" fields introduced in SMBIOS specification version 3.1.0.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-06 11:56:45.472191930 +0200
+++ dmidecode/dmidecode.c 2017-04-06 14:40:08.561804923 +0200
@@ -1536,6 +1536,21 @@ static void dmi_cache_size(u16 code)
printf(" %u kB", code);
}

+static void dmi_cache_size_2(u32 code)
+{
+ if (code & 0x80000000)
+ {
+ code &= 0x7FFFFFFFLU;
+ /* Use a more convenient unit for large cache size */
+ if (code >= 0x8000)
+ printf(" %u MB", code >> 4);
+ else
+ printf(" %u kB", code << 6);
+ }
+ else
+ printf(" %u kB", code);
+}
+
static void dmi_cache_types(u16 code, const char *sep)
{
/* 7.8.2 */
@@ -3576,10 +3591,16 @@ static void dmi_decode(const struct dmi_
printf("\tLocation: %s\n",
dmi_cache_location((WORD(data + 0x05) >> 5) & 0x0003));
printf("\tInstalled Size:");
- dmi_cache_size(WORD(data + 0x09));
+ if (h->length >= 0x1B)
+ dmi_cache_size_2(DWORD(data + 0x17));
+ else
+ dmi_cache_size(WORD(data + 0x09));
printf("\n");
printf("\tMaximum Size:");
- dmi_cache_size(WORD(data + 0x07));
+ if (h->length >= 0x17)
+ dmi_cache_size_2(DWORD(data + 0x13));
+ else
+ dmi_cache_size(WORD(data + 0x07));
printf("\n");
printf("\tSupported SRAM Types:");
dmi_cache_types(WORD(data + 0x0B), "\n\t\t");
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:56:19 UTC
Permalink
Add 3 new enumerated values for system slots from SMBIOS specification
version 3.1.0.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-06 14:40:08.561804923 +0200
+++ dmidecode/dmidecode.c 2017-04-06 14:49:18.246172245 +0200
@@ -1787,7 +1787,10 @@ static const char *dmi_slot_type(u8 code
"MXM 3.0 Type A",
"MXM 3.0 Type B",
"PCI Express 2 SFF-8639",
- "PCI Express 3 SFF-8639" /* 0x20 */
+ "PCI Express 3 SFF-8639",
+ "PCI Express Mini 52-pin with bottom-side keep-outs",
+ "PCI Express Mini 52-pin without bottom-side keep-outs",
+ "PCI Express Mini 76-pin" /* 0x23 */
};
static const char *type_0xA0[] = {
"PC-98/C20", /* 0xA0 */
@@ -1819,7 +1822,7 @@ static const char *dmi_slot_type(u8 code
* function dmi_slot_id below needs updating too.
*/

- if (code >= 0x01 && code <= 0x20)
+ if (code >= 0x01 && code <= 0x23)
return type[code - 0x01];
if (code >= 0xA0 && code <= 0xB6)
return type_0xA0[code - 0xA0];
@@ -1901,6 +1904,9 @@ static void dmi_slot_id(u8 code1, u8 cod
case 0x13: /* AGP */
case 0x1F: /* PCI Express 2 */
case 0x20: /* PCI Express 3 */
+ case 0x21: /* PCI Express Mini */
+ case 0x22: /* PCI Express Mini */
+ case 0x23: /* PCI Express Mini */
case 0xA5: /* PCI Express */
case 0xA6: /* PCI Express */
case 0xA7: /* PCI Express */
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:56:45 UTC
Permalink
Change the memory speed unit from MHz to MT/s as advised by version
3.1.0 of the SMBIOS specification.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

--- dmidecode.orig/dmidecode.c 2017-04-06 14:49:18.246172245 +0200
+++ dmidecode/dmidecode.c 2017-04-06 15:11:44.818787121 +0200
@@ -2490,7 +2490,7 @@ static void dmi_memory_device_speed(u16
if (code == 0)
printf(" Unknown");
else
- printf(" %u MHz", code);
+ printf(" %u MT/s", code);
}

/*
--
Jean Delvare
SUSE L3 Support

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Jean Delvare
2017-04-10 09:58:11 UTC
Permalink
SMBIOS 3.1.0 introduces a new structure type (43) for TPM devices.
Add support for it.

Signed-off-by: Jean Delvare <***@suse.de>
---
Note 1: this is untested, as I do not have access to any system
implementing this structure.
Note 2: if someone can make any sense of the TPM_VERSION structure,
as described in the TPM part 2 v1.2 specification, please let me
know. It looks to me like the engineers in charge were drunk when
they updated that part of the TPM specification. All I can see is
that they tried to solve a problem which did not exist, and created
one instead.

dmidecode.c | 101 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 98 insertions(+), 3 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-06 16:13:11.568686604 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:46:05.378964261 +0200
@@ -2,7 +2,7 @@
* DMI Decode
*
* Copyright (C) 2000-2002 Alan Cox <***@redhat.com>
- * Copyright (C) 2002-2015 Jean Delvare <***@suse.de>
+ * Copyright (C) 2002-2017 Jean Delvare <***@suse.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -50,6 +50,12 @@
* - DMTF DSP0239 version 1.1.0
* "Management Component Transport Protocol (MCTP) IDs and Codes"
* http://www.dmtf.org/standards/pmci
+ * - "TPM Main, Part 2 TPM Structures"
+ * Specification version 1.2, level 2, revision 116
+ * https://trustedcomputinggroup.org/tpm-main-specification/
+ * - "PC Client Platform TPM Profile (PTP) Specification"
+ * Family "2.0", Level 00, Revision 00.43, January 26, 2015
+ * https://trustedcomputinggroup.org/pc-client-platform-tpm-profile-ptp-specification/
*/

#include <stdio.h>
@@ -170,12 +176,13 @@ static const char *dmi_smbios_structure_
"Power Supply",
"Additional Information",
"Onboard Device",
- "Management Controller Host Interface", /* 42 */
+ "Management Controller Host Interface",
+ "TPM Device", /* 43 */
};

if (code >= 128)
return "OEM-specific";
- if (code <= 42)
+ if (code <= 43)
return type[code];
return out_of_spec;
}
@@ -3310,6 +3317,57 @@ static const char *dmi_management_contro
}

/*
+ * 7.44 TPM Device (Type 43)
+ */
+
+static void dmi_tpm_vendor_id(const u8 *p)
+{
+ char vendor_id[5];
+ int i;
+
+ /* ASCII filtering */
+ for (i = 0; i < 4 && p[i] != 0; i++)
+ {
+ if (p[i] < 32 || p[i] >= 127)
+ vendor_id[i] = '.';
+ else
+ vendor_id[i] = p[i];
+ }
+
+ /* Terminate the string */
+ vendor_id[i] = '\0';
+
+ printf(" %s", vendor_id);
+}
+
+static void dmi_tpm_characteristics(u64 code, const char *prefix)
+{
+ /* 7.1.1 */
+ static const char *characteristics[] = {
+ "TPM Device characteristics not supported", /* 2 */
+ "Family configurable via firmware update",
+ "Family configurable via platform software support",
+ "Family configurable via OEM proprietary mechanism" /* 5 */
+ };
+ int i;
+
+ /*
+ * This isn't very clear what this bit is supposed to mean
+ */
+ if (code.l & (1 << 2))
+ {
+ printf("%s%s\n",
+ prefix, characteristics[0]);
+ return;
+ }
+
+ for (i = 3; i <= 5; i++)
+ if (code.l & (1 << i))
+ printf("%s%s\n",
+ prefix, characteristics[i - 2]);
+}
+
+/*
* Main
*/

@@ -4425,6 +4483,43 @@ static void dmi_decode(const struct dmi_
}
break;

+ case 43: /* 7.44 TPM Device */
+ printf("TPM Device\n");
+ if (h->length < 0x1B) break;
+ printf("\tVendor ID:");
+ dmi_tpm_vendor_id(data + 0x04);
+ printf("\n");
+ printf("\tSpecification Version: %d.%d", data[0x08], data[0x09]);
+ switch (data[0x08])
+ {
+ case 0x01:
+ /*
+ * We skip the first 2 bytes, which are
+ * redundant with the above, and uncoded
+ * in a silly way.
+ */
+ printf("\tFirmware Revision: %u.%u\n",
+ data[0x0C], data[0x0D]);
+ break;
+ case 0x02:
+ printf("\tFirmware Revision: %u.%u\n",
+ DWORD(data + 0x0A) >> 16,
+ DWORD(data + 0x0A) && 0xFF);
+ /*
+ * We skip the next 4 bytes, as their
+ * format is not standardized and their
+ * usefulness seems limited anyway.
+ */
+ break;
+ }
+ printf("\tDescription: %s", dmi_string(h, data[0x12]));
+ printf("\tCharacteristics:\n");
+ dmi_tpm_characteristics(QWORD(data + 0x13), "\t\t");
+ if (h->length < 0x1F) break;
+ printf("\tOEM-specific Information: 0x%08X\n",
+ DWORD(data + 0x1B));
+ break;
+
case 126: /* 7.44 Inactive */
printf("Inactive\n");
break;
--
Jean Delvare
SUSE L3 Support

_______________________________________________
https://lists.nongnu.org/mailman/listinfo/dmidecode-devel
Jean Delvare
2017-04-10 09:58:35 UTC
Permalink
All pieces of the SMBIOS 3.1.0 specification are supported now.

Signed-off-by: Jean Delvare <***@suse.de>
---
dmidecode.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

--- dmidecode.orig/dmidecode.c 2017-04-07 10:47:22.558752494 +0200
+++ dmidecode/dmidecode.c 2017-04-07 10:48:15.058288465 +0200
@@ -25,7 +25,7 @@
* are deemed to be part of the source code.
*
* Unless specified otherwise, all references are aimed at the "System
- * Management BIOS Reference Specification, Version 3.0.0" document,
+ * Management BIOS Reference Specification, Version 3.1.0" document,
* available from http://www.dmtf.org/standards/smbios.
*
* Note to contributors:
@@ -75,7 +75,7 @@
#define out_of_spec "<OUT OF SPEC>"
static const char *bad_index = "<BAD INDEX>";

-#define SUPPORTED_SMBIOS_VER 0x0300
+#define SUPPORTED_SMBIOS_VER 0x0301

#define FLAG_NO_FILE_OFFSET (1 << 0)
#define FLAG_STOP_AT_EOT (1 << 1)
--
Jean Delvare
SUSE L3 Support

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